A Higher-Level Language for Hardware Synthesis

We describe SAFL+: a call-by-value, parallel language in the style of ML which combines imperative, concurrent and functional programming. Synchronous channels allow communication between parallel threads and π-calculus style channel passing is provided. SAFL+ is designed for hardware description and synthesis; a silicon compiler, translating SAFL+ into RTL-Verilog, has been implemented. By parameterising functions over both data and channels the SAFL+ aration becomes a powerful abstraction mechanism unifying a range of structuring techniques treated separately by existing HDLs. We show how SAFL+ is implemented at the circuit level and define the language formally by means of an operational semantics.

• Type: Conference
• Year: 2001
• Where: CHARME
• Authors: Richard Sharp, Alan Mycroft
• Keywords: Channels Allow Communication, CHARME 2001, Hardware, Parallel Language, Style Channel Passing