On the use of VHDL-based behavioral synthesis for telecom ASIC design

higher levels of abstraction, due to the still increasing design complexities that can be expected in the near future. Behavioral synthesis can play a key role in this prospect, as stand–alone hardware CAD tool, or integrated in a global system design flow strategy for HW/SW–codesign. However, we experienced that efficient use of behavioral synthesis tools for telecom non–DSP circuits requires functionality that goes beyond simply generating an RTL–synthesizable description. This functionality is discussed, together with a system level design methodology for efficient use of behavioral synthesis tools.

• Type: Conference
• Year: 1995
• Where: ISSS
• Authors: Mark Genoe, Paul Vanoostende, Geert van Wauwe
• Keywords: Behavioral Synthesis, Behavioral Synthesis Tools, Circuits Requires Functionality, Hardware, ISSS 1995