: Sorting large data sets has always been an important application, and hence has been one of the benchmark applications on new parallel architectures. We present a parallel sorting algorithm for the Cell processor that combines elements of bitonic sort and merge sort, and reduces the bandwidth to main memory by pipelining. We present runtime results of a partial prototype implementation and simulation results for the complete sorting algorithm, that promise performance advantages over previous implementations. Key words: Parallel Sort, Merge Sort, Cell Processor, Hybrid Sort
Jörg Keller, Christoph W. Kessler, Kalle K&ou