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ISLPED
2003
ACM

ILP-based optimization of sequential circuits for low power

14 years 5 months ago
ILP-based optimization of sequential circuits for low power
The power consumption of a sequential circuit can be reduced by decomposing it into subcircuits which can be turned off when inactive. Power can also be reduced by careful state encoding. Modeling a given circuit as a finite-state machine, we formulate its decomposition into submachines as an integer linear programming (ILP) problem, and automatically generate the ILP model with power minimization as the objective. A simple, but powerful state encoding method is used for the submachines to further reduce power consumption. We present experimental results which show that circuits designed by our approach consume 30% to 90% less power than conventional circuits. Categories and Subject Descriptors: B.7 INTEGRATED CIRCUITS. Additional classification: F.1 ION BY ABSTRACT DEVICES. General Terms: Algorithms, design, experimentation. Keywords Finite-state machine, decomposition, low power, integer linear programming.
Feng Gao, John P. Hayes
Added 05 Jul 2010
Updated 05 Jul 2010
Type Conference
Year 2003
Where ISLPED
Authors Feng Gao, John P. Hayes
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