Implementation of CMOS Low-power Integer-N Frequency Synthesizer for SOC Design

Abstract-- The paper reports the implementation of a frequency synthesizer for system-on-chip (SOC) design. The epi-digital CMOS process is used to provide SOC solution. This work focuses on low-power consumption to achieve longer life-time of batteries. A 2.4GHz frequency synthesizer has been fabricated in 0.18

• Type: Journal
• Year: 2008
• Where: JCP
• Authors: Debashis Mandal, T. K. Bhattacharyya
• Keywords: Epi-digital Cmos, Epi-digital Cmos Process, Frequency Synthesizer, JCP 2008