Implementing a Scheme for External Deterministic Self-Test

A new method for test resource partitioning is introduced which keeps the design-for-test logic independent of the test set and moves the test pattern dependent information to an external, programmable chip. The scheme includes a new decompression method for a fast and efficient communication between the external test chip and the circuit under test. The hardware costs on chip are significantly lower compared with a deterministic BIST scheme while the test application time is still in the same range. The proposed scheme is fully programmable, flexible and can be reused at board level for testing in the field.

• Type: Conference
• Year: 2005
• Where: VTS
• Authors: Abdul Wahid Hakmi, Hans-Joachim Wunderlich, Valentin Gherman, Michael Garbers, Jürgen Schlöffel
• Keywords: External Test Chip, Test Pattern, Test Resource Partitioning, VTS 2005