Improving Scalability and Per-Core Performance in Multi-Cores through Resource Sharing and Reconfiguration

Increasing the number of cores in a multi-core processor reduces per-core performance. On the other hand, providing more resources to each core limits the number of cores on a chip. In this paper, we propose a mechanism to improve the per-core performance while maintaining the scalability. In particular, we integrate a Reconfigurable Hardware Unit (RHU) in the resource-constrained cores to improve their performance. The RHU executes the frequently encountered instructions to increase the core's overall execution bandwidth, thus improving its performance. The RHU has low area overhead, and hence has minimal impact on scalability of the number of cores. To further limit the area overhead of this performance improving mechanism, generation of the reconfiguration bits for the RHUs of multiple cores is delegated to a single core. Our experiments show that the proposed architecture improves the per-core performance by an average of about 23% across a wide range of applications, while i...

• Type: Conference
• Year: 2009
• Where: VLSID
• Authors: Tameesh Suri, Aneesh Aggarwal
• Keywords: Area Overhead, Computer Aided Design, Multiple Cores, Performance Improving Mechanism, VLSID 2009