CSREAESA
2003
14 years 26 days ago
2003
Energy dissipation in cache memories is becoming a major design issue in embedded microprocessors. Predictive filter cache based instruction cache hierarchy is effective in reduci...
DSD
2008
IEEE
14 years 1 months ago
2008
IEEE
We evaluate the leakage reduction for both instruction and data cache in presence of drowsy or decay techniques. We discovered that a filter cache, traditionally used for reducing...
MICRO
1997
IEEE
14 years 3 months ago
1997
IEEE
Most modern microprocessors employ one or two levels of on-chip caches in order to improve performance. These caches are typically implemented with static RAM cells and often occu...
IWSOC
2003
IEEE
14 years 4 months ago
2003
IEEE
: - A filter cache is proposed at a higher level than the L1 (main) cache in the memory hierarchy and is much smaller. The typical size of filter cache is of the order of 512 Bytes...