Instruction Generation for Hybrid Reconfigurable Systems

In this work, we present an algorithm for simultaneous template generation and matching. The algorithm profiles the graph and iteratively contracts edges to create the templates. The algorithm is general and can be applied to any type of graph, including directed graphs and hypergraphs. We discuss how to target the algorithm towards the novel problem of instruction generation and selection for a hybrid (re)configurable systems. In particular, we target the Strategically Programmable System, which embeds complex computational units like ALUs, IP blocks, etc. into a configurable fabric. We argue that an essential compilation step for these systems is instruction generation, as it is needed to specify the functionality of the embedded computational units. Additionally, instruction generation can be used to create soft macros – tightly sequenced pre-specified operations placed in the configurable fabric.

• Type: Conference
• Year: 2001
• Where: ICCAD
• Authors: Ryan Kastner, Seda Ogrenci Memik, Elaheh Bozorgzadeh, Majid Sarrafzadeh
• Keywords: Embedded Computational Units, Hardware, ICCAD 2001, Instruction Generation, Simultaneous Template Generation