Intrinsic shortest path length: a new, accurate a priori wirelength estimator

A priori wirelength estimation is concerned with predicting various wirelength characteristics before placement. In this work we propose a novel, accurate estimator of net lengths. We observe that in “good” placements, the length of a net is very strongly correlated with the numbers of nets in the shortest paths connecting node pairs of the net, when each shortest path is computed under the restriction that the net itself does not exist. We refer to this as the net’s intrinsic shortest path length (ISPL). Using ISPL as a wirelength estimator has several advantages: (1) it transparently handles multi-pin nets and is a strong predictor of their length; (2) it strongly correlates with the average netlist wirelength; (3) it has a distribution that is similar to that of wirelength; and (4) it acts as a good predictor for individual net lengths. Based on ISPLs, we characterize VLSI netlists with a single value and develop an intuitive, empirical link between our proposed value and the...

• Type: Conference
• Year: 2005
• Where: ICCAD
• Authors: Andrew B. Kahng, Sherief Reda
• Keywords: Hardware, ICCAD 2005, Individual Net Lengths, Priori Global Interconnect, Shortest Path Length