DATE
2004
IEEE
14 years 4 months ago
2004
IEEE
In this work we improve top-down min-cut placers in the context of timing closure. Using the concept of boosting factors, we adjust net weights according to net spans, so as to re...
GLVLSI
2009
IEEE
14 years 4 months ago
2009
IEEE
DAC
2010
ACM
14 years 4 months ago
2010
ACM
DAC
2010
ACM
14 years 4 months ago
2010
ACM
ISQED
2002
IEEE
14 years 5 months ago
2002
IEEE
State-of-the-art verification tools are based on efficient operations on Boolean formulas. Traditional manipulation techniques are based on Binary Decision Diagrams (BDDs) and SAT...