The aim of the PhD thesis is the development of systematic methodologies both for hardware and software level for designing low-energy and performance efficient reconfigurable systems. This problem is tackled at two different design tasks, namely the design of efficient CLB architecture and the supporting CAD tools for mapping a VHDL-designed application onto the designed FPGA device.
K. Siozios, Dimitrios Soudris, Adonios Thanailakis