Memory bank aware dynamic loop scheduling

In a parallel system with multiple CPUs, one of the key problems is to assign loop iterations to processors. This problem, known as the loop scheduling problem, has been studied in the past, and several schemes, both static and dynamic, have been proposed. One of the attractive features of dynamic schemes, as compared to their static counterparts, is their ability of exploiting the latency variations across the execution times of the different loop iterations. In all the dynamic loop scheduling techniques proposed in literature so far, performance has been the primary metric of interest. In a battery-operated embedded execution environment, however, power consumption is another metric to consider during iteration-to-processor assignment. In particular, in a banked memory system, this assignment can have an important impact on memory power consumption, which can be a significant portion of the overall energy consumption, especially for data-intensive embedded applications such as thos...

• Type: Conference
• Year: 2007
• Where: DATE
• Authors: Mahmut T. Kandemir, Taylan Yemliha, Seung Woo Son, Ozcan Ozturk
• Keywords: DATE 2007, Hardware, Loop, Loop Iterations, Loop Scheduling