Memory testing with a RISC microcontroller

—Many systems are based on embedded microcontrollers. Applications demand for production and Power-On testing, including memory testing. Because low-end microcontrollers may not have memory BIST, the CPU will be the only resource to perform at least the Power-On tests. This paper shows the problems, solutions and limitations of CPUbased at-speed memory testing, illustrated with examples from the ATMEL RISC microcontroller.

• Type: Conference
• Year: 2010
• Where: DATE
• Authors: A. J. van de Goor, Georgi Gaydadjiev, Said Hamdioui
• Keywords: At-speed Memory Testing, DATE 2010, Hardware, Memory Testing, Power-On Testing