Minimizing Energy Consumption for High-Performance Processing

Power consumption is becoming an increasingly important constraint in the design of microprocessors. This paper examines the use of multiple constrained processors running at lowered voltage and frequency to perform a similaramount of work in less time and lower power than a uniprocessor. The paper also studies the effect of reducing cache and Branch Target Buffer (BTB) sizes for further reducing power consumption while still providing adequate performance. The best configuration requiring four processors reduced energy by 56%. Reducing cache and BTB provided a further 16% savings in energy while still finishing the workload in the same amount of time as the uniprocessor.

• Type: Conference
• Year: 2002
• Where: VLSID
• Authors: Eric F. Weglarz, Kewal K. Saluja, Mikko H. Lipasti
• Keywords: Multiple Constrained Processors, Power Consumption, Processors Reduced Energy, VLSI, VLSID 2002