Modeling design constraints and biasing in simulation using BDDs

Constraining and input biasing are frequently used techniques in functional verification methodologies based on randomized simulation generation. Constraints confine the simulation to a legal input space, while input biasing, which can be considered as a probabilistic constraint, makes it easier to cover interesting "corner" cases. In this paper, we propose to use constraints and biasing to form a simulation environment instead of using an explicit testbench in hierarchical functional verification. Both constraints and input biasing can depend on the state of the design and thus are very expressive in modeling the environment. We present a novel method that unifies the handling of constraints and biasing via the use of Binary Decision Diagrams (BDDs). The distribution of input vectors under the effect of constraints and input biasing are determined by what we refer to as the constrained probabilities. A BDD representing the constraints is first built, then an algorithm is ap...

• Type: Conference
• Year: 1999
• Where: ICCAD
• Authors: Jun Yuan, Kurt Shultz, Carl Pixley, Hillel Miller, Adnan Aziz
• Keywords: Hardware, ICCAD 1999, Input Biasing, Input Vectors, Simulation Generation