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DATE
2002
IEEE

Modeling Techniques and Tests for Partial Faults in Memory Devices

14 years 4 months ago
Modeling Techniques and Tests for Partial Faults in Memory Devices
: It has always been assumed that fault models in memories are sufficiently precise for specifying the faulty behavior. This means that, given a fault model, it should be possible to construct a test that ensures detecting the modeled fault. This paper shows that some faults, called partial faults, are particularly difficult to detect. For these faults, more operations are required to complete their fault effect and to ensure detection. The paper also presents fault analysis results, based on defect injection and simulation, where partial faults have been observed. The impact of partial faults on testing is discussed and a test to detect these partial faults is given. Key words: partial faults, DRAMs, fault models, defect simulation, memory testing, completing operations.
Zaid Al-Ars, A. J. van de Goor
Added 14 Jul 2010
Updated 14 Jul 2010
Type Conference
Year 2002
Where DATE
Authors Zaid Al-Ars, A. J. van de Goor
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