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21

DATE
2010
IEEE

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Multiplexed redundant execution: A technique for efficient fault tolerance in chip multiprocessors

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Multiplexed redundant execution: A technique for efficient fault tolerance in chip multiprocessors

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Pramod Subramanyan, Virendra Singh, Kewal K. Saluj

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Added	10 Jul 2010
Updated	10 Jul 2010
Type	Conference
Year	2010
Where	DATE
Authors	Pramod Subramanyan, Virendra Singh, Kewal K. Saluja, Erik Larsson

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