A novel methodology for transistor-level power estimation

Transistlw-level power simulators, which are more accurate than logic-level power estimators, have been popularly used to estimate the power dissipation of CMOS circuits. In thispapel; we introducecc1 method which extends the Monte-Carlo approachfor deriving the average power dissipation of a circuit using transistor-levelpower simulators. To reduce the simulation time, we propose a mixedlevel extrapolation technique to speed up the convergence rate of the process, and thereby to achieve a good balance between simulation time and accuracy. Experimental results show that this is apromising methodfor deriving the accurate power dissipation of a circuit within reasonable time budget.

• Type: Conference
• Year: 1996
• Where: ISLPED
• Authors: Shi-Yu Huang, Kwang-Ting Cheng, Kuang-Chien Chen, Mike Tien-Chien Lee
• Keywords: Average Power Dissipation, Hardware, ISLPED 1996, Power Dissipation, Transistlw-level Power Simulators