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ICCAD
1997
IEEE

Optimization techniques for high-performance digital circuits

14 years 4 months ago
Optimization techniques for high-performance digital circuits
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically transistor and interconnect sizes. The design metrics are not just delay, transition times, power and area, but also signal integrity and manufacturability. This tutorial paper discusses some of the recently proposed methods of circuit optimization, with an emphasis on practical application and methodology impact. Circuit optimization techniques fall into three broad categories. The rst is dynamic tuning, based on timedomain simulation of the underlying circuit, typically combined with adjoint sensitivity computation. These methods are accurate but require the speci cation of input signals, and are best applied to small data- ow circuits and cross-sections" of larger circuits. E cient sensitivity computation renders feasible the tuning of circuits with a few thousand transistors. Second, static tuners e...
Chandramouli Visweswariah
Added 26 Aug 2010
Updated 26 Aug 2010
Type Conference
Year 1997
Where ICCAD
Authors Chandramouli Visweswariah
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