Pattern Selection for Testing of Deep Sub-Micron Timing Defects

Due to process variations in deep sub-micron (DSM) technologies, the effects of timing defects are difficult to capture. This paper presents a novel coverage metric for estimating the test quality with respect to timing defects under process variations. Based on the proposed metric and a dynamic timing analyzer, we develop a pattern-selection algorithm for selecting the minimal number of patterns that can achieve the maximal test quality. To shorten the run time in dynamic timing analysis, we propose an algorithm to speed up the Monte-Carlo-based simulation. Our experimental results show that, selecting a small percentage of patterns from a multiple-detection transition fault pattern set is sufficient to maintain the test quality given by the entire pattern set. We present run-time and accuracy comparisons to demonstrate the efficiency and effectiveness of our pattern selection framework.

• Type: Conference
• Year: 2004
• Where: DATE
• Authors: Mango Chia-Tso Chao, Li-C. Wang, Kwang-Ting Cheng
• Keywords: DATE 2004, Dynamic Timing, Hardware, Process Variations, Test Quality