Performance-driven soft-macro clustering and placement by preserving HDL design hierarchy

In this paper, we present a performance-driven softmacro clustering and placement method which preserves HDL design hierarchy to guide the soft-macro placement process. We also present a complete chip design methodology by integrating the proposed method and a set of commercial EDA tools. Experiments on three industrial designs ranging from 75K to 230K gates demonstrate that the proposed soft-macro clustering and placement method improves critical-path delay on an average of 24.

• Type: Conference
• Year: 1998
• Where: ISPD
• Authors: Hsiao-Pin Su, Allen C.-H. Wu, Youn-Long Lin
• Keywords: Hardware, ISPD 1998, Performance-driven Softmacro Clustering, Placement Method, Soft-macro Placement Process