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ASPDAC
2010
ACM

Power and slew-aware clock network design for through-silicon-via (TSV) based 3D ICs

13 years 10 months ago
Power and slew-aware clock network design for through-silicon-via (TSV) based 3D ICs
Xin Zhao, Sung Kyu Lim
Added 10 Feb 2011
Updated 10 Feb 2011
Type Journal
Year 2010
Where ASPDAC
Authors Xin Zhao, Sung Kyu Lim
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