A scalable software-based self-test methodology for programmable processors

Software-based self-test (SBST) is an emerging approach to address the challenges of high-quality, at-speed test for complex programmable processors and systems-on chips (SoCs) that contain them. While early work on SBST has proposed several promising ideas, many challenges remain in applying SBST to realistic embedded processors. We propose a systematic scalable methodology for SBST that automates several key steps. The proposed methodology consists of (i) identifying test program templates that are well suited for test delivery to each module within the processor, (ii) extracting input/output mapping functions that capture the controllability/observability constraints imposed by a test program template for a specific module-under-test, (iii) generating module-level tests by representing the input/output mapping functions as virtual constraint circuits, and (iv) automatic synthesis of a software selftest program from the module-level tests. We propose novel RTL simulation-based techn...

• Type: Conference
• Year: 2003
• Where: DAC
• Authors: Li Chen, Srivaths Ravi, Anand Raghunathan, Sujit Dey
• Keywords: DAC 2003, Design Automation, Input/output Mapping Functions, Software-based Self-test, Test Program Template