Scratchpad memories vs locked caches in hard real-time systems: a quantitative comparison

We propose in this paper an algorithm for off-line selection of the contents of on-chip memories. The algorithm supports two types of on-chip memories, namely locked caches and scratchpad memories. The contents of on-chip memory, although selected off-line, is changed at run-time, for the sake of scalability with respect to task size. Experimental results show that the algorithm yields to good ratios of on-chip memory accesses on the worst-case execution path, with a tolerable reload overhead, for both types of on-chip memories. Furthermore, we highlight the circumstances under which one type of on-chip memory is more appropriate than the other depending of architectural parameters (cache block size) and application characteristics (basic block size).

• Type: Conference
• Year: 2007
• Where: DATE
• Authors: Isabelle Puaut, Christophe Pais
• Keywords: Algorithm, DATE 2007, Hardware, On-chip Memories, On-chip Memory