FPGA
2009
ACM
13 years 10 months ago
2009
ACM
Multi-field packet classification is a key enabling function of a variety of network applications, such as firewall processing, Quality of Service differentiation, traffic billing...
ANCS
2009
ACM
13 years 10 months ago
2009
ACM
Exact and approximate membership lookups are among the most widely used primitives in a number of network applications. Hash tables are commonly used to implement these primitive ...
JSAC
2006
14 years 12 days ago
2006
High-speed packet content inspection and filtering devices rely on a fast multi-pattern matching algorithm which is used to detect predefined keywords or signatures in the packets....
GLOBECOM
2008
IEEE
14 years 18 days ago
2008
IEEE
As the network line rates reach 40 Gbps today and 100 Gbps in the near future, performing deep packet inspection (DPI) in the Network Intrusion Detection and Prevention Systems (NI...
ISLPED
2010
ACM
14 years 19 days ago
2010
ACM
The on-chip memory is a dominant source of power and energy consumption in modern and future processors. This paper explores the use of a new emerging non-volatile memory technolo...
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
Memory space limitation is a serious problem for many embedded systems from diverse application domains. While circuit/packaging techniques are definitely important to squeeze la...
HOTOS
2009
IEEE
14 years 4 months ago
2009
IEEE
High performance on multicore processors requires that schedulers be reinvented. Traditional schedulers focus on keeping execution units busy by assigning each core a thread to ru...
DATE
2010
IEEE
14 years 5 months ago
2010
IEEE
—Multi-Processor System-on-Chips (MPSoCs) exploit task-level parallelism to achieve high computation throughput, but concurrent memory accesses from multiple PEs may cause memory...
ASPDAC
2004
ACM
14 years 5 months ago
2004
ACM
— It is predicted that 70% of the chip area will be occupied by memories in future system-onchips. The minimization of on-chip memory hence becomes increasingly important for cos...
ISCA
2007
IEEE
14 years 6 months ago
2007
IEEE
There are two basic models for the on-chip memory in CMP systems: hardware-managed coherent caches and software-managed streaming memory. This paper performs a direct comparison o...