Smart Memories: a modular reconfigurable architecture

Trends in VLSI technology scaling demand that future computing devices be narrowly focused to achieve high performance and high efficiency, yet also target the high volumes and low costs of widely applicable general purpose designs. To address these conflicting requirements, we propose a modular reconfigurable architecture called Smart Memories, targeted at computing needs in the 0.1

• Type: Conference
• Year: 2000
• Where: ISCA
• Authors: Ken Mai, Tim Paaske, Nuwan Jayasena, Ron Ho, William J. Dally, Mark Horowitz
• Keywords: Hardware, ISCA 2000, Smart Memories, Smart Memories Architecture, Smart Memories Chip