Speculative Trace Scheduling in VLIW Processors

VLIW processors are statically scheduled processors and their performance depends on the quality of the compiler’s scheduler. We propose a scheduling scheme where the application is first divided into decision trees and then further split into traces. We have developed a tool “SpliTree” to generate traces automatically. Using dynamic branch prediction for selecting the root of the decision tree from which the traces are scheduled using

• Type: Conference
• Year: 2002
• Where: ICCD
• Authors: Manvi Agarwal, S. K. Nandy, Jos T. J. van Eijndhoven, S. Balakrishnan
• Keywords: Decision Trees, Dynamic Branch Prediction, Hardware, ICCD 2002, VLIW Processors