Support vector machines for analog circuit performance representation

The use of Support Vector Machines (SVMs) to represent the performance space of analog circuits is explored. In abstract terms, an analog circuit maps a set of input design parameters to a set of performance figures. This function is usually evaluated through simulations and its range defines the feasible performance space of the circuit. In this paper, we directly model performance spaces as mathematical relations. We study approximation approaches based on two-class and one-class SVMs, the latter providing a better tradeoff between accuracy and complexity avoiding "curse of dimensionality" issues with 2-class SVMs. We propose two improvements of the basic one-class SVM performances: conformal mapping and active learning. Finally we develop an efficient algorithm to compute projections, so that topdown methodologies can be easily supported. Categories and Subject Descriptors B.7.2 [Integrated Circuits]: Design Aids-Verification General Terms Algorithms

• Type: Conference
• Year: 2003
• Where: DAC
• Authors: Fernando De Bernardinis, Michael I. Jordan, Alberto L. Sangiovanni-Vincentelli
• Keywords: 2-class Svms, DAC 2003, Design Automation, Feasible Performance Space, One-class Svms