The recent demand for system-on-chip RF mixed-signal design and aggressive supply-voltage reduction require chip-level accurate analysis of both the substrate and power delivery systems. Together with the rising frequency, low-k dielectric, copper interconnects, and high conductivity substrate, the inductance effects raised serious concern recently. However, the increasing design complexity creates tremendous challenges for chip-level powerdelivery substrate co-analysis. In this paper, we propose a novel and efficient reluctance-based passive model order reduction technique to serve these tasks. Our work, SuPREME(Substrate and Power-delivery Reluctance-Enhanced Macromodel Evaluation) not only greatly reduces the computational complexity of previous reluctance-based model order algorithms but is also capable of handling large number of noise sources efficiently. To facilitate the analysis of inductive substrate return paths and evaluate the high-frequency substrate coupling effects, ...