Towards synthetic benchmark circuits for evaluating timing-driven CAD tools

For the development and evaluation of CAD-tools for partitioning, floorplanning, placement, and routing of digital circuits, a huge amount of benchmark circuits with suitable characteristic parameters is required. Observing the lack of industrial benchmark circuits for use in evaluation tools, one could consider to actually generate such circuits. In this paper, we extend a graph-based benchmark generation method to include functional information. The use of a user-specified component library, together with the restriction that no combinational loops are introduced, now broadens the scope to timing-driven and logic optimizer applications. Experiments show that the resemblance between the characteristic Rent curve and the net degree distribution of real versus synthetic benchmark circuits is hardly influenced by the suggested extensions and that the resulting circuits are more realistic than before. However, the synthetic benchmark circuits are still very redundant, compared to exis...

• Type: Conference
• Year: 1999
• Where: ISPD
• Authors: Dirk Stroobandt, Peter Verplaetse, Jan Van Campenhout
• Keywords: Benchmark Circuits, Hardware, Industrial Benchmark Circuits, ISPD 1999, Synthetic Benchmark Circuits