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    Transistor-level layout of high-density regular circuits

    14 years 7 months ago
    Transistor-level layout of high-density regular circuits
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    Yi-Wei Lin, Malgorzata Marek-Sadowska, Wojciech Ma
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    Added 19 May 2010
    Updated 19 May 2010
    Type Conference
    Year 2009
    Where ISPD
    Authors Yi-Wei Lin, Malgorzata Marek-Sadowska, Wojciech Maly
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