ISPD 2009 | Sciweavers

Several approaches to post-silicon adaptation require feedback from a replica of the nominal critical path, whose variations are intended to reﬂect those of the entire circuit a...

Qunzeng Liu, Sachin S. Sapatnekar

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ISPD
2009
ACM

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Physical optimization for FPGAs using post-placement topology rewriting

14 years 7 months ago

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Val Pevzner, Andrew A. Kennings, Andy Fox

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ISPD
2009
ACM

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A faster approximation scheme for timing driven minimum cost layer assignment

14 years 7 months ago

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As VLSI technology moves to the 65nm node and beyond, interconnect delay greatly limits the circuit performance. As a critical component in interconnect synthesis, layer assignmen...

Shiyan Hu, Zhuo Li, Charles J. Alpert

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ISPD
2009
ACM

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A new algorithm for simultaneous gate sizing and threshold voltage assignment

14 years 7 months ago

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Gate sizing and threshold voltage (Vt) assignment are popular techniques for circuit timing and power optimization. Existing methods, by and large, are either sensitivity-driven h...

Yifang Liu, Jiang Hu

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ISPD
2009
ACM

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Multi-voltage floorplan design with optimal voltage assignment

14 years 7 months ago

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Qian Zaichen, Evangeline F. Y. Young

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