Yield enhancement for 3D-stacked memory by redundancy sharing across dies

Three-dimensional (3D) memory products are emerging to fulfill the ever-increasing demands of storage capacity. In 3D-stacked memory, redundancy sharing between neighboring vertical memory blocks using short through-silicon vias (TSVs) is a promising solution for yield enhancement. Since different memory dies are with distinct fault bitmaps, how to selectively matching them together to maximize the yield for the bonded 3D-stacked memory is an interesting and relevant problem. In this paper, we present novel solutions to tackle the above problem. Experimental results show that the proposed methodology can significantly increase memory yield when compared to the case that we only bond self-reparable dies together.

• Type: Journal
• Year: 2010
• Where: ICCAD
• Authors: Li Jiang, Rong Ye, Qiang Xu
• Keywords: 3D-stacked Memory, Hardware, ICCAD 2010, Short Through-silicon Vias, Vertical Memory Blocks