1921 search results - page 118 / 385 » : Designing a Scalable Build Process |
126
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DSD
2006
IEEE
15 years 7 months ago
2006
IEEE
Abstract-- Networks-on-Chip will serve as the central integration platform in future complex SoC designs, composed of a large number of heterogeneous processing resources. Most res...
162
Voted
ICPP
2006
IEEE
15 years 9 months ago
2006
IEEE
— This paper focuses on the transfer of large data in SMP systems. Achieving good performance for intranode communication is critical for developing an efficient communication s...
125
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AAAI
1998
15 years 4 months ago
1998
We have built a set of integrated AI systems (called conversation machines) to enable transaction processing over the telephone for limited domains like stock trading and banking....
131
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IPPS
1998
IEEE
15 years 7 months ago
1998
IEEE
This paper presents performance results for the design and implementation of parallel pipelined Space-Time Adaptive Processing (STAP) algorithms on parallel computers. In particul...
98
Voted
CHI
2010
ACM
15 years 8 months ago
2010
ACM
Designing for a supple interaction, involving users bodily and emotionally into a ‘dance’ with a system is a challenging task. Any break-ups in interaction become fatal to the...