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» : Designing a Scalable Build Process
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DATE
2006
IEEE
195views Hardware» more  DATE 2006»
14 years 3 months ago
Application specific instruction processor based implementation of a GNSS receiver on an FPGA
In this paper the concept of a reconfigurable hardware macro to be used as a generic building block in lowpower, low-cost SoC for multioperable GNSS positioning is described, feat...
Götz Kappen, Tobias G. Noll
ECIS
2003
13 years 11 months ago
Development of a security methodology for cooperative information systems: the cooPSIS project
Since networks and computing systems are vital components of today's life, it is of utmost importance to endow them with the capability to survive physical and logical faults...
Mariagrazia Fugini, Mario Mezzanzanica
SBCCI
2003
ACM
115views VLSI» more  SBCCI 2003»
14 years 2 months ago
Combining Retiming and Recycling to Optimize the Performance of Synchronous Circuits
Recycling was recently proposed as a system-level design technique to facilitate the building of complex System-on-Chips (SOC) by assembling pre-designed components. Recycling all...
Luca P. Carloni, Alberto L. Sangiovanni-Vincentell...
ICECCS
2002
IEEE
99views Hardware» more  ICECCS 2002»
14 years 2 months ago
Using Role-Based Modeling Language (RBML) to Characterize Model Families
Cost-effective development of large, integrated computer-based systems can be realized through systematic reuse of development experiences throughout the development process. In t...
Dae-Kyoo Kim, Robert B. France, Sudipto Ghosh, Eun...
TEI
2009
ACM
115views Hardware» more  TEI 2009»
14 years 2 months ago
Stop-motion prototyping for tangible interfaces
Stop-motion animation brings the constraints of the body, space and materials into video production. Building on the tradition of video prototyping for interaction design, stop mo...
Leonardo Bonanni, Hiroshi Ishii