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126
Voted
DAC
2006
ACM
16 years 4 months ago
2006
ACM
We address the problem of estimating controller delay from high-level specifications during behavioral synthesis. Typically, the critical path of a synthesised behavioral design g...
129
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ICCCN
2008
IEEE
15 years 9 months ago
2008
IEEE
—Parallel firewalls offer a scalable low latency design for inspecting packets at high speeds. Typically consisting of an array of m firewalls, these systems filter arriving p...
111
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DATE
2007
IEEE
15 years 9 months ago
2007
IEEE
Networks-on-Chip (NoCs) have recently emerged as a scalable alternative to classical bus and point-to-point architectures. To date, performance evaluation of NoC designs is largel...
129
Voted
PDP
2006
IEEE
15 years 9 months ago
2006
IEEE
— The Parallel Resource-Optimal (PRO) computation model was introduced by Gebremedhin et al. [2002] as a framework for the design and analysis of efficient parallel algorithms. ...
122
Voted
NOSSDAV
2005
Springer
15 years 8 months ago
2005
Springer
In this position paper, we examine recent technology trends that have resulted in a broad spectrum of camera sensors, wireless radio technologies, and embedded sensor platforms wi...