This paper presents a new method to synthesize timed asynchronous circuits directly from the specification without generating a state graph. The synthesis procedure begins with a ...
We present an algorithm that restructures the state transition graph STG of a sequential circuit so as to reduce power dissipation. The STG is modi ed without changing the behav...
—A wide variety of DSP design tools have been developed that incorporate dataflow graph representations into their GUI-based design environments. However, as the complexity of ap...
Ivan Corretjer, Chia-Jui Hsu, Shuvra S. Bhattachar...
Recent work on modeling the web graph has dwelt on capturing the degree distributions observed on the web. Pointing out that this represents a heavy reliance on "local" p...
We introduce a new approach to take into account the memory architecture and the memory mapping in the High- Level Synthesis of Real-Time embedded systems. We formalize the memory...