186 search results - page 19 / 38 » 1995 high level synthesis design repository |
SIES
2007
IEEE
14 years 1 months ago
2007
IEEE
— High level synthesis is one of the next major steps to improve the hw/sw co-design process. The advantages of high nthesis are two-fold. At first the level of abstraction is r...
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...
FDL
2005
IEEE
14 years 1 months ago
2005
IEEE
Heterogeneous system specifications implicitly assume parallel execution of their components that rely on supporting platform architectures and operating systems. Unfortunately, c...
ICCAD
2002
IEEE
14 years 4 months ago
2002
IEEE
For many years, CMOS process scaling has allowed a steady increase in the operating frequency and integration density of integrated circuits. Only recently, however, have we reach...
LREC
2008
13 years 9 months ago
2008
The paper deals with the process of designing a phonetically and prosodically rich speech corpus for unit selection speech synthesis. The attention is given mainly to the recordin...