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» 1995 high level synthesis design repository
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EICS
2010
ACM
14 years 23 days ago
Using ensembles of decision trees to automate repetitive tasks in web applications
Web applications such as web-based email, spreadsheets and form filling applications have become ubiquitous. However, many of the tasks that users try to accomplish with such web ...
Zachary Bray, Per Ola Kristensson
DATE
1999
IEEE
147views Hardware» more  DATE 1999»
14 years 12 hour ago
Efficient BIST Hardware Insertion with Low Test Application Time for Synthesized Data Paths
In this paper, new and efficient BIST methodology and BIST hardware insertion algorithms are presented for RTL data paths obtained from high level synthesis. The methodology is ba...
Nicola Nicolici, Bashir M. Al-Hashimi
FPL
2004
Springer
112views Hardware» more  FPL 2004»
14 years 1 months ago
Storage Allocation for Diverse FPGA Memory Specifications
A previous study [1] demonstrates the advantages of replacing registers by FPGA embedded memories during the storage allocation phase of High-Level Synthesis. The trend in new FPGA...
Dalia Dagher, Iyad Ouaiss
CCS
2008
ACM
13 years 9 months ago
Online subscriptions with anonymous access
Online privacy is an increasingly important problem, as many services are now offered in a digital form. Privacy (or the lack thereof) is of a special concern in subscriptions to ...
Marina Blanton
EDCC
2006
Springer
13 years 11 months ago
SEU Mitigation Techniques for Microprocessor Control Logic
The importance of fault tolerance at the processor architecture level has been made increasingly important due to rapid advancements in the design and usage of high performance de...
T. S. Ganesh, Viswanathan Subramanian, Arun K. Som...