Sciweavers

10 search results - page 2 / 2
» 3D Stacked Microprocessor: Are We There Yet
Sort
View
ISCA
2008
IEEE
116views Hardware» more  ISCA 2008»
14 years 1 months ago
3D-Stacked Memory Architectures for Multi-core Processors
Three-dimensional integration enables stacking memory directly on top of a microprocessor, thereby significantly reducing wire delay between the two. Previous studies have examin...
Gabriel H. Loh
RECOMB
2008
Springer
14 years 7 months ago
Automatic Recognition of Cells (ARC) for 3D Images of C. elegans
The development of high-resolution microscopy makes possible the high-throughput screening of cellular information, such as gene expression at single cell resolution. One of the cr...
Fuhui Long, Hanchuan Peng, Xiao Liu, Stuart K. Kim...
ISCA
2007
IEEE
110views Hardware» more  ISCA 2007»
14 years 1 months ago
A novel dimensionally-decomposed router for on-chip communication in 3D architectures
Much like multi-storey buildings in densely packed metropolises, three-dimensional (3D) chip structures are envisioned as a viable solution to skyrocketing transistor densities an...
Jongman Kim, Chrysostomos Nicopoulos, Dongkook Par...
CVPR
2010
IEEE
14 years 3 months ago
Linear View Synthesis Using a Dimensionality Gap Light Field Prior
Acquiring and representing the 4D space of rays in the world (the light field) is important for many computer vision and graphics applications. Yet, light field acquisition is c...
Anat Levin, Fredo Durand
DATE
2009
IEEE
132views Hardware» more  DATE 2009»
14 years 2 months ago
Power and performance of read-write aware Hybrid Caches with non-volatile memories
—Caches made of non-volatile memory technologies, such as Magnetic RAM (MRAM) and Phase-change RAM (PRAM), offer dramatically different power-performance characteristics when com...
Xiaoxia Wu, Jian Li, Lixin Zhang, Evan Speight, Yu...