306 search results - page 10 / 62 » A 3d-audio reconfigurable processor |
EH
1999
IEEE
14 years 15 hour ago
1999
IEEE
MorphoSys is a system-on-chip which combines a RISC processor with an array of reconfigurable cells. The important features of MorphoSys are coarse-grain granularity, dynamic reco...
DATE
2004
IEEE
13 years 11 months ago
2004
IEEE
Reconfigurable Systems-on-Chip (SoC) consist of large Field-Programmable Gate-Arrays (FPGAs) and standard processors. The reconfigurable logic can be used for application-specific...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
A new dynamic vector approach for the selection and management of the configuration of a reconfigurable superscalar processor is proposed. This new method improves on previous wor...
ASPDAC
2009
ACM
13 years 8 months ago
2009
ACM
Performance evaluation is a serious challenge in designing or optimizing reconfigurable instruction set processors. The conventional approaches based on synthesis and simulations a...
FPL
2008
Springer
13 years 9 months ago
2008
Springer
The power consumption of Dynamically Reconfigurable Processing Array (DRPA) is quantitatively analyzed by using a real chip layout and applications taking into account the reconfi...