306 search results - page 43 / 62 » A 3d-audio reconfigurable processor |
DDECS
2007
IEEE
14 years 2 months ago
2007
IEEE
– The implementation and the fault simulation technique for the highly reliable digital design using two FPGAs under a processor control is presented. Two FPGAs are used for dupl...
IPPS
1999
IEEE
14 years 17 hour ago
1999
IEEE
HeteroSort load balances and sorts within static or dynamic networks. Upon failure of a node or path, HeteroSort uses a genetic algorithm to minimize the distribution path by optim...
DAGSTUHL
2006
13 years 9 months ago
2006
Long-term reliability of processors in embedded systems is experiencing growing attention since decreasing feature sizes and increasing power consumption have a negative influence...
GECCO
2009
Springer
13 years 5 months ago
2009
Springer
Simultaneous Multithreading (SMT) is a technology aimed at improving the throughput of the processor core by applying Instruction Level Parallelism (ILP) and Thread Level Parallel...
FPL
2010
Springer
13 years 5 months ago
2010
Springer
When utilizing reconfigurable hardware there are many applications that will require more memory than is available in a single hardware block. While FPGAs have tools and mechanisms...