51 search results - page 8 / 11 » A Block JRS Algorithm for Highly Parallel Computation of SVD... |
EUROPAR
2000
Springer
13 years 11 months ago
2000
Springer
Abstract. Definitions for the uniform representation of d-dimensional matrices serially in Morton-order (or Z-order) support both their use with cartesian indices, and their divide...
ICPADS
2006
IEEE
14 years 1 months ago
2006
IEEE
We consider schemes for enacting task share changes—a process called reweighting—on real-time multiprocessor platforms. Our particular focus is reweighting schemes that are de...
ICS
1999
Tsinghua U.
13 years 11 months ago
1999
Tsinghua U.
—This paper explores the use of compiler optimizations which optimize the layout of instructions in memory. The target is to enable the code to make better use of the underlying ...
FCCM
2006
IEEE
14 years 1 months ago
2006
IEEE
Field-Programmable Gate Arrays (FPGAs) are being employed in high performance computing systems owing to their potential to accelerate a wide variety of long-running routines. Par...
IEEEPACT
2007
IEEE
14 years 1 months ago
2007
IEEE
Multi-core processors naturally exploit thread-level parallelism (TLP). However, extracting instruction-level parallelism (ILP) from individual applications or threads is still a ...