170 search results - page 27 / 34 » A C compiler for a processor with a reconfigurable functiona... |
FCCM
2008
IEEE
14 years 1 months ago
2008
IEEE
The map-reduce model requires users to express their problem in terms of a map function that processes single records in a stream, and a reduce function that merges all mapped out...
CODES
2005
IEEE
14 years 1 months ago
2005
IEEE
As wireless platforms converge to multimedia systems, architectures must converge to support voice, data, and video applications. From a processor architecture perspective, suppor...
ICFP
2012
ACM
11 years 9 months ago
2012
ACM
Graphics processing units (GPUs) provide both memory bandwidth and arithmetic performance far greater than that available on CPUs but, because of their Single-Instruction-Multiple...
CGO
2003
IEEE
14 years 20 days ago
2003
IEEE
Many processor architectures provide a set of addressing modes in their address generation units. For example DSPs (digital signal processors) have powerful addressing modes for e...
CPHYSICS
2007
13 years 7 months ago
2007
An improved version of the function estimation program GDF is presented. The main enhancements of the new version include: multi-output function estimation, capability of definin...