170 search results - page 29 / 34 » A C compiler for a processor with a reconfigurable functiona... |
ICMCS
2007
IEEE
14 years 1 months ago
2007
IEEE
The H.264 decoder has a sequential, control intensive front end that makes it difficult to leverage the potential performance of emerging manycore processors. Preparsing is a fun...
ISCA
2010
IEEE
13 years 5 months ago
2010
IEEE
Due to their high volume, general-purpose processors, and now chip multiprocessors (CMPs), are much more cost effective than ASICs, but lag significantly in terms of performance a...
PLDI
2004
ACM
14 years 24 days ago
2004
ACM
Pointer analysis is a critical problem in optimizing compiler, parallelizing compiler, software engineering and most recently, hardware synthesis. While recent efforts have sugges...
IPPS
2002
IEEE
14 years 9 days ago
2002
IEEE
SAC is a purely functional array processing language designed with numerical applications in mind. It supports generic, high-level program specifications in the style of APL. How...
RSP
2005
IEEE
14 years 28 days ago
2005
IEEE
Abstract— John von Neumann proposed his famous architecture in a context where hardware was very expensive and bulky. His goal was to maximize functionality with minimal hardware...