1404 search results - page 80 / 281 » A C to Hardware Software Compiler |
CODES
2007
IEEE
14 years 4 months ago
2007
IEEE
We present a co-synthesis approach that accelerates reactive software processing by moving the calculation of complex expressions into external combinational hardware. The startin...
ICCAD
2001
IEEE
14 years 7 months ago
2001
IEEE
In this paper we describe a software pipelining framework, CALiBeR (Cluster Aware Load Balancing Retiming Algorithm), suitable for compilers targeting clustered embedded VLIW proc...
ISCA
2007
IEEE
14 years 4 months ago
2007
IEEE
This paper presents core fusion, a reconfigurable chip multiprocessor (CMP) architecture where groups of fundamentally independent cores can dynamically morph into a larger CPU, ...
ISSS
2000
IEEE
14 years 1 months ago
2000
IEEE
The paper presents a novel software-pipelining algorithm suitable for optimizing compilers targeting embedded VLIW processors. The proposed algorithm is different from previous ap...
DAGSTUHL
1996
13 years 11 months ago
1996
As partial evaluation gets more mature, it is now possible to use this program transformation technique to tackle realistic languages and real-size application programs. However, t...