322 search results - page 40 / 65 » A Case Study of Hardware and Software Synthesis in ForSyDe |
DDECS
2007
IEEE
14 years 2 months ago
2007
IEEE
—Current system-on-chip implementations integrate IP blocks from different vendors. Typical problems are incompatibility and integration overheads. This paper presents a case stu...
CAV
2010
Springer
13 years 11 months ago
2010
Springer
Well-defined memory consistency models are necessary for writing correct parallel software. Developing and understanding formal specifications of hardware memory models is a chal...
IEEEPACT
2008
IEEE
14 years 2 months ago
2008
IEEE
This paper presents and characterizes the Princeton Application Repository for Shared-Memory Computers (PARSEC), a benchmark suite for studies of Chip-Multiprocessors (CMPs). Prev...
VLSID
2005
IEEE
14 years 8 months ago
2005
IEEE
This paper presents a highly efficient processor design methodology based on the LISA 2.0 language. Typically the architecture design phase is dominated by an iterative processor ...
LCPC
2009
Springer
14 years 8 days ago
2009
Springer
Abstract. Current hardware trends place increasing pressure on programmers and tools to optimize scientific code. Numerous tools and techniques exist, but no single tool is a pana...