Sciweavers

380 search results - page 26 / 76
» A Case Study on Partial Evaluation in Embedded Software Desi...
Sort
View
CASES
2007
ACM
13 years 11 months ago
Fragment cache management for dynamic binary translators in embedded systems with scratchpad
Dynamic binary translation (DBT) has been used to achieve numerous goals (e.g., better performance) for general-purpose computers. Recently, DBT has also attracted attention for e...
José Baiocchi, Bruce R. Childers, Jack W. D...
FPL
2007
Springer
176views Hardware» more  FPL 2007»
14 years 1 months ago
ReconOS: An RTOS supporting Hard- and Software Threads
Modern platform FPGAs integrate fine-grained reconfigurable logic with processor cores and allow the creation of complete configurable systems-on-chip. However, design methodol...
Enno Lübbers, Marco Platzner
ERSA
2003
137views Hardware» more  ERSA 2003»
13 years 9 months ago
Next Generation Architecture for Heterogeneous Embedded Systems
The Software Communications Architecture (SCA), a mandatory specification for Software Radio implementations by the Joint Tactical Radio System (JTRS), defines a Common Object R...
S. Murat Bicer, Frank Pilhofer, Graham Bardouleau,...
CASES
2010
ACM
13 years 5 months ago
Balancing memory and performance through selective flushing of software code caches
Dynamic binary translators (DBTs) are becoming increasingly important because of their power and flexibility. However, the high memory demands of DBTs present an obstacle for all ...
Apala Guha, Kim M. Hazelwood, Mary Lou Soffa
EMSOFT
2006
Springer
13 years 9 months ago
Reusable models for timing and liveness analysis of middleware for distributed real-time and embedded systems
Distributed real-time and embedded (DRE) systems have stringent constraints on timeliness and other properties whose assurance is crucial to correct system behavior. Formal tools ...
Venkita Subramonian, Christopher D. Gill, Cé...