Sciweavers

334 search results - page 15 / 67
» A Case for Deconstructing Hardware Transactional Memory Syst...
Sort
View
IISWC
2008
IEEE
14 years 3 months ago
STAMP: Stanford Transactional Applications for Multi-Processing
Abstract—Transactional Memory (TM) is emerging as a promising technology to simplify parallel programming. While several TM systems have been proposed in the research literature,...
Chi Cao Minh, JaeWoong Chung, Christos Kozyrakis, ...
ISCA
2008
IEEE
134views Hardware» more  ISCA 2008»
14 years 3 months ago
Flexible Decoupled Transactional Memory Support
A high-concurrency transactional memory (TM) implementation needs to track concurrent accesses, buffer speculative updates, and manage conflicts. We present a system, FlexTM (FLE...
Arrvindh Shriraman, Sandhya Dwarkadas, Michael L. ...
IEEEPACT
2007
IEEE
14 years 3 months ago
JudoSTM: A Dynamic Binary-Rewriting Approach to Software Transactional Memory
With the advent of chip-multiprocessors, we are faced with the challenge of parallelizing performance-critical software. Transactional memory (TM) has emerged as a promising progr...
Marek Olszewski, Jeremy Cutler, J. Gregory Steffan
CODES
2002
IEEE
14 years 1 months ago
Hardware support for real-time embedded multiprocessor system-on-a-chip memory management
The aggressive evolution of the semiconductor industry — smaller process geometries, higher densities, and greater chip complexity — has provided design engineers the means to...
Mohamed Shalan, Vincent John Mooney III
ISCA
1993
IEEE
137views Hardware» more  ISCA 1993»
14 years 24 days ago
Transactional Memory: Architectural Support for Lock-Free Data Structures
A shared data structure is lock-free if its operations do not require mutual exclusion. If one process is interrupted in the middle of an operation, other processes will not be pr...
Maurice Herlihy, J. Eliot B. Moss